Advanced english Design, simulate, implement and test digital logic for FPGA using Verilog Perform synthesis, timing analysis, floorplanning and test using Xilinx Vivado and Synopsys HAPS tools. Write constraints to fix timing problems. Programming skills in TCL
Transport is at the core of modern society. Imagine using your expertise to shape sustainable transport and infrastructure solutions for the future? If you seek to make a difference on a global scale, working with next-gen
Requisitos : - Bachelor’s/Master’s Degree in Electronics Engineering, Electrical and/or Electronics Engineering, Mechatronics, Control Systems or equivalent; - Relevant experience in the automotive domain. Knowledge of EE architecture; - Experience of working on embedded SW development