Soft Skills for all profiles Willingness to learn and proactivity genuine interest in growing and not waiting passively for tasks Clear communication ability to express technical questions and report status Analytical thinking breaking down complex problems
Advanced english Design, simulate, implement and test digital logic for FPGA using Verilog Perform synthesis, timing analysis, floorplanning and test using Xilinx Vivado and Synopsys HAPS tools. Write constraints to fix timing problems. Programming skills in TCL (for
Position : JR IOS Developer Location : Mexico ,Brazil and Costa Rica Experience : 5 to 7 Years Responsibilities: •Develop and enhance iOS application features in collaboration with senior engineers. •Implement device communication modules and application